1. Field of the Invention
The present invention relates in general to electronic circuits and systems and in particular clock generation circuits, systems and methods employing phase interpolation.
2. Description of the Related Art
Many digital and mixed digital-analog circuits and systems operate from a set of clocks derived from a single master clock. Typically, these clocks are generated using a programmable phase-locked loop (PLL) including a phase detector, charge pump, loop filter, ring oscillator, frequency dividers, and associated control circuitry. However, notwithstanding their wide use, traditional PLLs are significantly limited in their capacity to generate signals with precise phase relationships.
Since many state-of-the-art circuits and system require the generation of clock signals with more precise phase relationships than those produced by traditional PLLs, new techniques are required. Among other things, circuits, systems and methods are needed for the generation of signals with precise phase relationships. Moreover, such circuits, systems and methods should be programmable with fine or very fine phase resolution.
According to one embodiment of the principles of the present invention, a signal generator is disclosed which includes oscillator circuitry for generating first and second signals having a selected phase relationship. An interpolator interpolates between the phase of the first signal and the phase of the second signal to generate a third signal having a phase between the phases of the first and second signals.
The principles of the present invention support the generation of clock signals having a more precise phase relationship than those produced by traditional phase locked loops. In addition to enhanced precision, the inventive principles are also embodied in circuits, systems and methods which allow phase programmability of a given signal with fine or very fine phase resolution.